DSL Forum TR-067 Implemented Tests

DSL Forum TR-067 - Implemented Tests

The following is a list of the currently implemented tests taken from the DSL Forum TR-067 test plan. Tests that have been implemented are highlighted in Green text. Tests that have not yet been implemented are highlighted in Grey text.

Section 8 - Physical Layer Test Cases

8.1.1 Basic Functional Bit Swap Test
8.1.2 Verification of CRC error reporting by ATU-R
8.1.3 Check ADSL Diagnostic Tools
8.1.4 Dying Gasp
8.1.5 Modular Connector Pins
8.1.6 Ethernet Connector Pinout
8.1.7 Upstream Power Cutback
8.1.8 ATU-R Register Reporting via EOC
8.1.9 Request Downstream Power Cutback
8.2 Sudden Application of RFI
8.3 DSL Noise Spike/Surge Tests
8.4 Stress Test
8.5.1 Analog Front End Power
8.5.2 PSD Measurement
8.5.3 Longitudinal Balance - LCL
8.5.4 Longitudinal Balance - LOV

Section 9 - Higher Layer Test Cases

9.1.1 Loopback at the ATU-R
9.1.2 Maximum Number of VC's
9.1.3 Maximum VPI/VCI Range
9.1.4 Default VPI/VCI
9.1.5 QoS Support for CBR / UBR Traffic
9.1.6 QoS Support for rtVBR / UBR Traffic
9.1.7 QoS Support for nrtVBR / UBR Traffic
9.1.8 F5 OAM Support
9.2.1 Packet Throughput Test
9.2.2 Packet Latency Test
9.3.1 PPPoE
9.4.1 PPPoA
9.5.1 Verify IP Bridged
9.6.1 PC Re-boot
9.6.2 Power Cycle Test
9.6.3 Link Cycle Test
9.6.4 Verify 10/100 Ethernet Auto-negotiation (802.3u)

ANNEX A - PHYSICAL LAYER TEST CASES FOR SYSTEMS USING G.992.1 ANNEX A

A.1.1 CPE Margin Verification Test
A.1.1.7 CO Margin Verification Test (Optional)
A.1.2 ANSI T1-413 Operation
A.1.3 Operation in the Presence of Impulse Noise Events
A.1.4 Verification of downstream fine gain values
A.1.5 Loop Tests with Ports Set for Adaptive Rate
A.1.6 Loop Tests with Ports Set for Fixed Rate
A.1.7 CSA #4 Standard Loop
A.1.8 ANSI 13 Standard Loop
A.1.9 Bridged Tap Tests
A.2.1 European - CPE Margin Verification Test
A.2.2 European - Verification of downstream fine gain values
A.2.3 European - Loop Tests with Ports Set for Adaptive Rate
A.2.4 European - Loop Tests with Ports Set for Fixed Rate

ANNEX B - PHYSICAL LAYER TEST CASES FOR SYSTEMS USING G.992.1 ANNEX B

B.2.1 CPE Margin Verification Test
B.2.2 CO Margin Verification Test (Optional)
B.2.3 Verification of downstream fine gain values
B.2.4 Loop Tests with Ports Set for Adaptive Rate*
B.2.5 Loop Tests with Ports Set for Fixed Rate*

* Line simulator compensation is not available for these tests.